The invention pertains to a digital phase meter.
EP-A1-0 122 491 discloses a digital phase meter circuit for determining the phase difference between the edge of a pulse of a first clock signal and the edge of a pulse of a second clock signal in the sampling interval of two pulses of the second clock signal. In one embodiment of this phase meter circuit, the pulse of a first clock signal is derived from the horizontal flyback pulse of the horizontal deflection circuit of a television receiver, and the phase difference from a pulse of a second clock signal derived from the transmitted phase reference pulse is determined. That phase meter circuit contains an A/D converter which must be clocked at a multiple of the horizontal flyback pulse repetition rate, a switchable multiplier following the A/D converter, and a clocked integrator.
One object of the invention is to provide a digital phase meter circuit which is suitable for monolithic integration and which requires a smaller amount of circuitry than the prior art circuit so that the area required on the integrated-circuit chip is limited.